eldee
February 22, 2020, 7:58pm
1
When specifying the number of samples for multisampling antialiasing in the PRC configuration, the created window has the maximum number of samples supported by the graphic card.
This difference of behaviour is visible when optionally using FilterManager, as the antialiasing applied will change depending of the usage of a rendering buffer or not.
Here is a test program :
#!/usr/bin/env python3
from panda3d.core import *
from direct.showbase.ShowBase import ShowBase
load_prc_file_data("", "framebuffer-multisample 1 #t")
load_prc_file_data("", "multisamples 2")
base = ShowBase()
props = FrameBufferProperties()
props.set_rgba_bits(8, 8, 8, 8)
props.set_multisamples(2)
buffer = base.win.make_texture_buffer("testBuffer", 256, 256, fbp=props)
print(base.win.get_fb_properties())
print(buffer.get_fb_properties())
Output:
depth_bits=24 color_bits=24 red_bits=8 green_bits=8 blue_bits=8 alpha_bits=8 multisamples=4 back_buffers=1 force_hardware
color_bits=24 red_bits=8 green_bits=8 blue_bits=8 alpha_bits=8 multisamples=2 force_hardware
rdb
February 22, 2020, 8:11pm
2
What is the output of glxinfo? Is there a visual listed that supports exactly 2 multisamples?
eldee
February 22, 2020, 8:49pm
3
Yes, it is supported, see below, at least if I understand glxinfo correctly
Here is an updated code to use FilterManager and print the buffer info after the buffer is created
#!/usr/bin/env python3
from panda3d.core import *
from direct.showbase.ShowBase import ShowBase
from direct.filter.FilterManager import FilterManager
load_prc_file_data("", "framebuffer-multisample 1 #t")
load_prc_file_data("", "multisamples 8")
base = ShowBase()
print(base.win.get_fb_properties())
props = FrameBufferProperties()
props.set_rgba_bits(8, 8, 8, 8)
props.set_multisamples(4)
manager = FilterManager(base.win, base.cam)
textures = {'color': Texture()}
final_quad = manager.render_scene_into(textures=textures, fbprops=props)
buffer = manager.buffers[-1]
print(buffer.get_fb_properties())
def print_info():
print(base.win.get_fb_properties())
print(buffer.get_fb_properties())
base.accept("i", print_info)
base.run()
Here is the output of glxinfo (I had to truncate the end as one can not create a post bigger than 32K)
228 GLX Visuals
visual x bf lv rg d st colorbuffer sr ax dp st accumbuffer ms cav
id dep cl sp sz l ci b ro r g b a F gb bf th cl r g b a ns b eat
----------------------------------------------------------------------------
0x071 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x072 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x074 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x075 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x076 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x077 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x078 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x079 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x07a 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x07b 24 tc 0 24 0 r y . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x07c 24 tc 0 32 0 r y . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x07d 24 tc 0 24 0 r . . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x07e 24 tc 0 32 0 r . . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x07f 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x080 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x081 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x082 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x083 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x084 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x085 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x086 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x087 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x088 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x089 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x08a 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x08b 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x08c 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x08d 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x08e 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x08f 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x090 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x091 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x092 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x093 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x094 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x095 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x096 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x097 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x098 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x099 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x09a 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x09b 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x09c 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x09d 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x09e 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x09f 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0a0 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0a1 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0a2 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0a3 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0a4 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0a5 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0a6 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0a7 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0a8 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0a9 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0aa 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0ab 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0ac 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0ad 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0ae 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0af 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0b0 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0b1 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0b2 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0b3 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0b4 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0b5 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0b6 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0b7 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x0b8 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x0b9 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x0ba 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x0bb 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x0bc 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x0bd 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x0be 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x0bf 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x0c0 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x0c1 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x0c2 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x0c3 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x0c4 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x0c5 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x0c6 24 dc 0 24 0 r y . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x0c7 24 dc 0 32 0 r y . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x0c8 24 dc 0 24 0 r . . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x0c9 24 dc 0 32 0 r . . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x0ca 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x0cb 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x0cc 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x0cd 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x0ce 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x0cf 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x0d0 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x0d1 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x0d2 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x0d3 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x0d4 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x0d5 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x0d6 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x0d7 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x0d8 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x0d9 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x0da 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0db 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0dc 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0dd 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0de 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0df 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0e0 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0e1 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0e2 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0e3 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0e4 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0e5 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0e6 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0e7 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0e8 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0e9 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0ea 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0eb 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0ec 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0ed 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0ee 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0ef 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0f0 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0f1 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x0f2 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0f3 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0f4 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0f5 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x0f6 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0f7 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0f8 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0f9 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0fa 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0fb 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0fc 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0fd 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x0fe 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x0ff 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x100 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x101 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x102 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x103 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x104 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x105 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x106 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x107 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x108 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x109 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x073 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x10a 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x10b 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x10c 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x10d 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x10e 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x10f 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x110 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x111 32 tc 0 24 0 r y . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x112 32 tc 0 32 0 r y . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x113 32 tc 0 24 0 r . . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x114 32 tc 0 32 0 r . . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x115 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x116 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x117 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x118 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x119 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x11a 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x11b 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x11c 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x11d 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x11e 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x11f 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x120 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x121 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x122 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x123 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x124 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x125 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x126 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x127 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x128 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x129 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x12a 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x12b 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x12c 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x12d 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x12e 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x12f 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x130 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x131 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x132 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x133 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x134 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x135 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x136 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x137 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x138 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x139 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x13a 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x13b 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x13c 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x13d 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x13e 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x13f 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x140 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x141 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x142 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x143 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x144 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x145 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x146 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x147 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x148 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x149 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x14a 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x14b 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x14c 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x14d 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x14e 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x14f 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x150 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x151 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x152 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x153 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x154 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
311 GLXFBConfigs:
visual x bf lv rg d st colorbuffer sr ax dp st accumbuffer ms cav
id dep cl sp sz l ci b ro r g b a F gb bf th cl r g b a ns b eat
----------------------------------------------------------------------------
0x155 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x156 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x157 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x158 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x159 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x15a 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x15b 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x15c 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x15d 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x15e 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x15f 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x160 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x161 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x162 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x163 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x164 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x165 24 tc 0 24 0 r y . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x166 24 dc 0 24 0 r y . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x167 24 tc 0 32 0 r y . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x168 24 dc 0 32 0 r y . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x169 24 tc 0 24 0 r . . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x16a 24 dc 0 24 0 r . . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
0x16b 24 tc 0 32 0 r . . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x16c 24 dc 0 32 0 r . . 8 8 8 8 . s 4 0 0 16 16 16 16 0 0 None
0x16d 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x16e 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x16f 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x170 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x171 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x172 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x173 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x174 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x175 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x176 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 2 1 Ncon
0x177 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x178 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 2 1 Ncon
0x179 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x17a 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 4 1 Ncon
0x17b 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x17c 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 4 1 Ncon
0x17d 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x17e 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x17f 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x180 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x181 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x182 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x183 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x184 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x185 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x186 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 2 1 Ncon
0x187 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x188 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 2 1 Ncon
0x189 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x18a 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 4 1 Ncon
0x18b 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x18c 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 4 1 Ncon
0x18d 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x18e 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x18f 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x190 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x191 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x192 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x193 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x194 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x195 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x196 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x197 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x198 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x199 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x19a 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x19b 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x19c 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x19d 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x19e 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x19f 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1a0 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1a1 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1a2 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1a3 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1a4 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1a5 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1a6 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1a7 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1a8 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1a9 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1aa 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1ab 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1ac 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1ad 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1ae 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1af 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1b0 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1b1 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b2 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b3 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b4 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b5 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b6 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b7 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b8 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1b9 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1ba 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1bb 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1bc 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 8 1 Ncon
0x1bd 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1be 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1bf 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1c0 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1c1 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1c2 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1c3 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1c4 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 16 1 Ncon
0x1c5 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1c6 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1c7 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1c8 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1c9 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1ca 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1cb 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1cc 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1cd 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1ce 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1cf 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1d0 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1d1 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1d2 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1d3 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1d4 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 8 1 Ncon
0x1d5 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1d6 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1d7 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1d8 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1d9 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1da 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1db 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1dc 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 16 1 Ncon
0x1dd 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1de 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1df 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1e0 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1e1 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1e2 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1e3 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1e4 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 32 1 Ncon
0x1e5 24 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1e6 24 dc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1e7 24 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1e8 24 dc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1e9 24 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1ea 24 dc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1eb 24 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1ec 24 dc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 32 1 Ncon
0x1ed 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x1ee 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x1ef 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 8 16 16 16 16 0 0 None
0x1f0 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 8 16 16 16 16 0 0 None
0x1f1 32 tc 0 24 0 r y . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x1f2 32 tc 0 32 0 r y . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x1f3 32 tc 0 24 0 r . . 8 8 8 0 . s 4 24 0 16 16 16 16 0 0 None
0x1f4 32 tc 0 32 0 r . . 8 8 8 8 . s 4 24 0 16 16 16 16 0 0 None
0x1f5 32 tc 0 24 0 r y . 8 8 8 0 . s 4 0 0 16 16 16 16 0 0 None
...
eldee
February 22, 2020, 8:59pm
4
To clarify, the first post was tested on macOS and the second one on Linux, hence the difference of number of samples
rdb
February 22, 2020, 10:02pm
5
I’m trying to decide whether this should be considered a bug or not.
The mechanism that is being used to create the main framebuffer is very different from the mechanism being used to create an FBO. When we create an FBO, we have complete freedom to set the formats of each attachment (within some limits), and accordingly, we can ask for an attachment that has exactly 2 multisamples.
Creating the window framebuffer, however, is out of the hands of Panda. We ask the driver for a list of possible configurations and then we use a scoring system to determine which one is the closest match to what you ask for. The scoring system is inherently fiddly, because it has to make judgments like whether getting 8 extra depth bits is more preferable than having 2 extra multisamples, and things like that.
We could certainly tweak the scoring algorithm so that in this case it would prefer the visual with 2 multisamples, and I’m happy to entertain a PR that does that. But the general problem is that the mechanism for determining framebuffer properties is very different, and therefore will in many cases give different results.
For the record, if you put notify-level-glxdisplay debug in Config.prc, you should be able to get more information about the different visuals that GLX exposes and maybe some more about how Panda chooses it.
On macOS, by the way, all this is even worse. We don’t even get to ask Cocoa for a list of framebuffer configurations; we just throw some properties at it and have to live with whatever it gives us. If you ask Cocoa for 2 multisamples, and it gives you 4, there’s nothing we can do about that.
eldee
February 22, 2020, 10:29pm
6
Thank you for the really instructing explanation ! It’s indeed much more complex than I thought and probably not worth the effort. I guess I will always use render to buffer instead, so I have complete control of the actual configuration and keep the window framebuffer as simple as possible.
rdb
February 22, 2020, 11:05pm
7
Yes, that sounds like a good idea.